llcontrol-sync2v-core.c File Reference

demonstrates SYNC_2V mode. More...

#include "local.h"
#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include <errno.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <sys/mman.h>
#include <sys/stat.h>
#include <sys/time.h>
#include <sys/types.h>
#include <unistd.h>
#include <popt.h>
#include "acq32ioctl.h"
#include "acq32busprot.h"
#include "llif.h"
#include "llprotocol.h"
#include "llcontrol.h"
#include "x86timer.h"
#include "llcontrol-core.h"

Go to the source code of this file.

Defines
#define	FLAVOR   "ACQ196"
#define	SAMPLE_SIZE   (96*2)
#define	EACHBBB   (dac_buf[icard].bbb)
#define	EACHDAC_BASE   (EACHBBB + LLCV2_AO_HSBS)
#define	EACHDAC_BASE16   ((u16*)EACHDAC_BASE)
#define	V2SETDACS(src, icard)   memcpy(EACHDAC_BASE, (src)+(icard)*32, DAC_SAMPLE_SIZE)
#define	OFFSET   0
Functions
static void	sync_2v_updateTstats (u32 cmd, struct Card *card, struct TimingStats *tstats)
	updates timing stats from embedded host buffer data
static u32	card_sync_2v_WaitDmaDone (struct Card *card)
void	appEnterLLC_SYNC_2V (int icard, struct MU *mu, struct TestDescription *td)
	set up LLCV2_INIT buffer and enter mode.
int	runSYNC_2V (struct TestDescription *td, int soft_clock)
	runs the test SYNC_2V mode.

---

Detailed Description

demonstrates SYNC_2V mode.

• ./set.sync2v
• llcontrol [opts] -W SYNC2V ECM

• SYNC2V optimises the data transfer by reducing the number of transfers-per-cycle to 2:
  • VI : all the inputs in one block.
  • VO : all the outputs in one block.
    • definitions of offsets in VI, VO are in acq32busprot.h, look for LLCV2_

Definition in file llcontrol-sync2v-core.c.

---

Define Documentation

#define EACHBBB   (dac_buf[icard].bbb)

#define EACHDAC_BASE   (EACHBBB + LLCV2_AO_HSBS)

#define EACHDAC_BASE16   ((u16*)EACHDAC_BASE)

#define FLAVOR   "ACQ196"

Definition at line 67 of file llcontrol-sync2v-core.c.

#define OFFSET   0

Referenced by runSYNC_2V(), runSYNC_2VAO32(), and runSYNC_ECM().

#define SAMPLE_SIZE   (96*2)

#define V2SETDACS	(		src,
			icard
	)			memcpy(EACHDAC_BASE, (src)+(icard)*32, DAC_SAMPLE_SIZE)

Referenced by runSYNC_2V(), runSYNC_2VAO32(), and runSYNC_ECM().

---

Function Documentation

void appEnterLLC_SYNC_2V	(	int	icard,
		struct MU *	mu,
		struct TestDescription *	td
	)

set up LLCV2_INIT buffer and enter mode.

Buffer set up as 4K block at offset 0

Todo:

• this overwrites settings from initV2Stats(), initV2Stats is therefore redundant.

set up for single 4K buffer

uses V2 synchronization

Definition at line 90 of file llcontrol-sync2v-core.c.

References TestDescription::arg, TestDescription::cards, TestDescription::channels, TestDescription::clkpos, commandModifiers(), TestDescription::ARG::divisor, EACHBUF, enterLLC_SYNC_ECM(), getBusAddr(), getVaddr(), TestDescription::internal_loopback, LLCV2_AI_HSBT, llcv2_hb_offset, PRINTF, short, Card::sync_2v_offset_status_hsbt, Card::tlatch, TestDescription::trpos, updateTstats, and waitDmaDone.

Referenced by runTest().

static u32 card_sync_2v_WaitDmaDone

(

struct Card *

card

)

[static]

Definition at line 82 of file llcontrol-sync2v-core.c.

References Card::buf, getVaddr(), llv2WaitDmaDone_2v(), Card::mbx, Card::sync_2v_offset_status_hsbt, and Card::tlatch.

int runSYNC_2V	(	struct TestDescription *	td,
		int	soft_clock
	)

runs the test SYNC_2V mode.

PSEUDO-CODE:

• (1) Clear the latch timer
• (2) Set a local memory target address and arm the capture
• (3) Poll for counter running (hardware counter starts on external gate)
• (4) Iterate for required number of samples:
• (5) [optionally send a soft clock command] trigger an acquisition
• (6) Wait for DMA Done - at this point data is available in target mem. A "real" control application is probably getting most of its calcs done here rather than simply polling
• (7) [Get the latch (sample) and current uSec counters from the boards - only if interested]
• (8) Check the process has not stopped (external gate high)
• (b) write data to host side buffer(LLCV2_AO_HSBS)
• (b.1) take the incoming value on feedback_channel and propagate to all DACS. default is to assume HAWG on DAC0 (so feedback_channel better be 0 !), but td->update_dacs makes a better test.
• (b.15) special case where we are DRIVING the initial DAC signal from host side.
• (b.2) simple feedforward case - just drive all DACS from AWG pattern.

(b.2)

Definition at line 127 of file llcontrol-sync2v-core.c.

References DAC_COUNT, TestDescription::decimation, TestDescription::do_work, doApplicationWork(), EACHBBB, EACHBUF, EACHCARD, EACHDAC_BASE, EACHDAC_BASE16, EACHMBX, TestDescription::feedback, TestDescription::feedback_channel, FIRSTBUF, FIRSTMBX, FOREACHCARD, FOREACHCARD_MARK_TIME, G_quit, getBusAddr(), getMboxPollcount(), getVaddr(), TestDescription::hardware_gate_off, icard, TestDescription::iter, TestDescription::iterations, LLC_CSR_M_ARM, LLC_CSR_M_SOFTCLOCK, LLC_MAKE_DECIM, llCounterRunning(), LLCV2_AO_HSBS, llSetCmd(), llSetTlatch(), llv2InitDmaDone(), MARK_TIME, memset32(), TestDescription::min_latency_test, OFFSET, POLLALERT, PRINTF, TestDescription::stats_buf, TimingStats::target_poll, td_get_next_dac_data(), TimingStats::tlatch, TestDescription::tlog, TestDescription::update_dacs, updateTargetAddr(), updateTimingStats(), updateTstats, V2SETDACS, and waitDmaDone.

Referenced by runTest().

static void sync_2v_updateTstats	(	u32	cmd,
		struct Card *	card,
		struct TimingStats *	tstats
	)			[static]

updates timing stats from embedded host buffer data

Definition at line 71 of file llcontrol-sync2v-core.c.

References Card::buf, getVaddr(), LLC_GET_TCYCLE, LLC_SYNC2V_IN_MBOX0, LLC_SYNC2V_IN_MBOX2, LLC_SYNC2V_IN_TINST, llv2_extend32(), Card::sync_2v_offset_status_hsbt, TimingStats::tinst, and TimingStats::tprocess.